| High-temperature superconductor (HTSC) wires have been researched intensively due to its extensive applications in the modern technology. Comparing with the first-generation HTSC tapes (BSCCO), the second generation YBa2Cu3O7-δ (YBCO) HTSC wires have the advantages to be lower ac loses, better in-field performance and lower processing costs. The main difficulties in fabricating coated conductors are lattice mismatch and the diffusion of oxygen and metal atom. It is necessary to deposit buffer layers between flexible metal tapes and YBCO coated conductors. The commonly used buffer architecture consisted of CeO2 (cap layer)/YSZ (yttria-stabilized ZrO2) (barrier layer)/CeO2 (seed layer).In this dissertation, the fabrication of buffer layers on rolling-assisted biaxially textured substrates (RABiTS) with reactive direct-current magnetron sputtering method was systematically studied to ensure whether these can work as the growing template for YBCO layer and block the diffusion efficiently, and then, the subsequent growth of YBCO coated conductors was also investigated.A systematic study of the growth conditions for CeO2 seed layers was performed. The parameters of plasma bombardment, H2O pressure, total pressure, substrate temperature and sputtering power were examined with respect to their role in the texturing process. By characterizing CeO2 films using x-ray diffraction (XRD), atomic force microscopy (AFM) and scanning electron microscopy (SEM), optimum processing parameters are summarized as following: Substrate temperature being 750℃, H2O pressure being 1×10-3Pa, sputtering power ranging from 30 to 45 w, total pressure being 2Pa. With optimizing the deposition conditions, strictly c-axis orientation, an out-plane full-width half-maximum (FWHM) value of 2.5°, and an in-plane FWHM of 4.5°was achieved. The reel-to-reel moving system was adopted to fabricate long length buffer tape for coated conductors. The results exhibited good uniformity for both sides.By the orthogonal intersection analysis about the growth of YSZ barrier layer, the optimum conditions were obtained. Moreover, the influence on growth behavior between YSZ layer and CeO2 seed layer was investigated.The CeO2 cap layers grown on the YSZ barrier layer with optimized parameters exhibit high-quality crystallinity, sharp interfaces and dense and smooth surface, which can satisfy all the requirements of the template for the subsequent YBCO coated conductors.YBCO layers were fabricated on CeO2/YSZ/CeO2, resulting in highly textured YBCO with out-of-plane FWHM values of≈4.5°and in-plane FWHM values of≈5.9°. Transition temperatures (Tc) of≈87.3K and critical current values (Jc) of≈1.3MA/cm2 were obtained. In addition, too high temperature and rough surface of the CeO2 cap layer would result in the formation of BaCeO3 and deteriorate to the epitaxial growth of the YBCO films.To enhance super current carrying capability, the second generation YBCO HTSC wires must have thickness of a few to several micrometers, so the study on preparation of thick film is very significant. High quality epitaxial YBCO superconducting films with difference thicknesses were fabricated on (001) LaAlO3 substrate. The effect of film thickness on texture, residual stress, surface morphology, and electrical properties was investigated systematically. The films epitaixally grew with strictly c-axis orientation, and no a-axis-oriented growth was observed up to a thickness of 2μm. Residual stress was calculated using the crystalline group method and the x-ray lattice parameter method. A residual stress theoretical model was put forward for better comprehension of the dependence between thickness and stress. In order to increase Ic, we have also developed a multilayer architecture of YBCO thick films with CaCuO2 interlayer. It was found that the YBCO properties were greatly improved with optimum thickness and number of the interlayer. This multilayer approach makes it possible to fabricate very high critical current coated conductors.The process of multi-buffer layers increases the cost of the second generation YBCO HTSC wires, and makes them impractical to use for commercial applications. We report a newly developed method, named the in-situ postannealing texture (IPAT) technique to fabricate CeO2 single buffer layer. The annealing temperature and time dependence of the grain alignment in CeO2 buffer layers was studied. High quality CeO2 layers were achieved at annealing temperature from 750℃to 850℃, with the annealing time from 10min to 20min. Atomic force microscope revealed, via the novel IPAT method, a continuous, dense, and crack-free surface morphology for CeO2 thin films with thickness up to 300nm, which acted as a sufficiently good single buffer for YBCO coated conductors. YBCO films grown on thicker CeO2 buffer layers exhibited excellent c-axis oriented growth, Tc about 86.4K, Jc about 0.8MA/cm2 at 77K and Ic about 80A/cm. For fabrication of oxide buffer layers on metallic tape, the IPAT process has the advantage of high rate and preparation of dense, crack-free morphology layers, so it is very promising for applicability of IPAT technique for coated conductors' fabrication. |