Research On Topology And Digital Control Technique For High Power 400Hz Medium Frequency Inverter

Medium static power system has been becoming a trend in development for the medium supply in the latest generation vessel many countries, so successful resolution to the key techniques needed by high power medium frequency inverter will offer a guarantee for a safe, reliable and no-break power. This dissertation is devoted to a topology and its digital control technique for 300kVA-rate 400Hz/115V inverter. Major efforts in this study are as follows:1) Study of topology suitable for high power 400Hz/115V inverter and its output LC filter optimum design; 2) Digital control delay mechanism of production, influence to the 400Hz system and some methods which can reduce it; 3) Proportional resonant control parameters design considering digital control delay in high power 400Hz/115V inverter.The device switching frequency is low and the output voltage fundamental frequency is high in high power 400Hz/115V inverters, so the control bandwidth is limited and it is hard to promise a good waveform quality. The main circuit of inverter adopts the combination topology of three independently single-phase two-H-Bridge cascaded inverters in order to reach good control effect when powering nonlinear and unbalanced loads, after the performance of several major multilevel inverter topologies has been compared. The upper limit of switching frequency is estimated by detailed calculating and analyzing. The output voltage's mathematical expression of the two-H-Bridge cascaded topology was derived, and the regularities of sideband distribution and THD variation were reached. Then the output LC filter was designed simultaneously considering other several factors such as the fundamental voltage drop across the filter inductor, the inductor current ripple. The simulations and experiments verified the effectiveness of the proposed scheme.Mechanism of production of digital control delay, its influence to the 400Hz system and methods which can reduce it were analyzed. In order to reduce delay introduced by digital control, five sinusoidal pulse-width modulation (SPWM) methods which are symmetrical uniformly sampling SPWM, asymmetric uniformly sampling SPWM, improved asymmetric uniformly sampling SPWM, multiple sampling fixed update SPWM and multiple sampling immediate update SPWM were introduced and the mechanism of production of digital control delay in these methods was analyzed based on H bridge inverter. The analysis shows the latter three methods can reduce effectively digital control delay, and that the experiments verified the validity of this conclusion. The influence of improved asymmetric uniformly sampling SPWM on digital control delay is analyzed based on single-phase two-H-Bridge cascaded inverter and the corresponding PWM pulse generating mothod based on FPGA and DSP was introduced. Frequency domain analysis of delay time is studied, and 1,2 and 3-order Pade approximation is used to express delay time. After their approximation precisions were compared, the conclusion that 2 or 3-order Pade approximation is suitable for 400Hz inverter system is come to.Proportional resonant control method considering digital control delay was study in high power 400Hz inverter with different switching frequency. Control parameters were designed in the continuous domain by introduced the equivalent time delay and delay influence to the 400Hz system was analyzed. When feeding a linear load, the inverter can meet the system performance demands with low switching frequency. When feeding a nonlinear load, the inverter can not meet the system performance demands even with higher switching frequency. If output voltage feed-forward compensation is adopted, the system no-load resonant peak and output impedance in frequency domain were reduced. Therefore the inverter adopted output voltage feed-forward compensation can meet the system performance demands with higher switching frequency (larger than 6 kHz).Finally, The corresponding experiments in a single-phase low power 400Hz inverter prototype was done. The experiments are accordant with the theoretic analysis. The results show the reducing of delay time make the system performance improved, and verifies the effectiveness of the proposed scheme which introduces the equivalent time delay in the continuous domain design in 400Hz system.