Keyword [clock jitter] Result: 21 - 40 | Page: 2 of 3 21.  A Fast-Locking Low-Jitter Pulsewidth Control Loop For High-Speed Pipelined ADC 22.  Research On Reconfigurable Direct RF Sampling Receiver 23.  Design Of A High-Speed Low-Jitter CMOS Clock Stabilization Circuit 24.  Design And Implementation Of An Acquisition System Based On Time-interleaved Sampling Method 25.  High-speed High-resolution Pipelined ADC Design And Research 26.  Clock Circuit Design Of 2.5GSPS High Resolution Data Acquisition System 27.  Research And Design Of Clock Duty Cycle Corrector Circuit In High Speed ADC 28.  Research And Realization On Reconfigurable Digital Receiver 29.  Study And Design Of Multiplying Delay-locked Loop 30.  Research And Design On High-speed Clock Receiver Embedded With Duty Cycle Corrector 31.  Research On Simulation Technology Of Time Domain Companding Signals And Satellite Navigation Signals 32.  Research And Realize Of One Wideband Full Digital Radar Receiver 33.  CMOS High Resolution Wideband Phase-locked Loop Circuit Design 34.  Hardware Circuit Design Of IF Signal Playback Module 35.  Research On Multi-chain Clock Jitter Measurement Circuit Of Picosecond Based On FPGA 36.  Design Of Frequency-locked Loop Circuit Based On Resistive Frequency To Voltage Convertion 37.  Research And Implementation Of Direct Bitstream Digital Coding Technology 38.  Design of High Speed I/O Interfaces for High Performance Microprocessors 39.  Noise and clock jitter analysis of sigma-delta modulators and periodically switched linear networks 40.  Design considerations for low phase jitter clock generators   <<First  <Prev  Next>  Last>>  Jump to

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