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Keyword [Verilog HDL]
Result: 21 - 40 | Page: 2 of 10
21. Design Of The Viterbi Decoder And The Rake Receiver
22. Research On All Digital Phase-Locked Loop With High Precision Automatic Modulus Control
23. The Design Of CMOS Sensor Evaluation Board Based On USB
24. Research And Application Of The Function Verification In The IP Core Design
25. Design USB Device Controller Based On FPGA Technology
26. VLSI Architecture Of JPEG2000 Bit-Plane Coding
27. An OSD Scheme Design Based On Data Compression
28. Design And Implementation Of All Digital Spread Spectrum Transceiver Using FPGA
29. Research And Implementation Of Synchronization Technique Of Digital Receiver Based On FPGA
30. The Study And Design Of IP Core Base On 8-bit Microcontroller
31. Design Of FPGA Image Processing Board
32. FPGA Implementation Of Pure Interger LOG-MAP Turbo Encoder/Decoder
33. Study And Implementation Of Gray Controls For Asynchronous Pseudo Color LED Display Screen
34. Rate-Controllable Near-Lossless Image Compression And Its FPGA Implementation
35. Design And Implementation Of Image Compression System Based On FPGA
36. Design And Implementation Of High Speed Reusable SPI Bus With Verilog HDL
37. The Design Of Evaluation Board For H.264 Based On FPGA
38. Design And Simulation Of DDS Based On Verilog HDL
39. Hardware Design And Simulation Of Audio Decoder Of MPEG-1 Layer2
40. A Design And Implementation Of AVS Audio Decoder Based On Hardware And Software Cooperation
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