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Keyword [self-test]
Result: 181 - 200 | Page: 10 of 10
181.
Built-in self-test methodologies for concurrent testing of analog/mixed-signal systems-on-chip
182.
Built-in self-test techniques for analog and mixed signal circuits
183.
Built-in-Self Test of Transmitter I/Q Mismatch and Nonlinearities Using Self-Mixing Envelope Detector
184.
Deterministic built-in self test for digital circuits
185.
Reducing test data volume for system-on-chip integrated circuits using test data compression and built-in self-test
186.
Built-in Self-Test and Calibration of Mixed-signal Devices
187.
Built -in self -test for radio frequency system -on -chip
188.
Built-in self-test schemes for analog and mixed signal devices
189.
Software-based self-test and diagnosis for processors and system-on-chips
190.
IC testing: Energy consumption ratio and broadcast built-in self-test
191.
New built-in self test methods for scan designs
192.
Embedded software-based self-test for system-on-a-chip design
193.
Extending the reach of self-test approaches in VLSI
194.
A re-configurable pipeline ADC architecture with built-in self-test techniques
195.
Test strategies for built-in self-test at the algorithmic and register-transfer levels
196.
Built-in self-test technique for high-speed phase-locked loops
197.
New pseudo random testing techniques for scan-based built-in self-test
198.
Built-in self-test for interconnect faults via boundary scan
199.
A self-driven test methodology for built-in self-test of sequential circuits
200.
Test synthesis and self-test in high-performance VLSI digital signal processing
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