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Keyword [double gate]
Result: 41 - 48 | Page: 3 of 3
41.
Development of a process flow for self -aligned double -gate MOSFET by tunnel epitaxy using nitrided thermal oxide as gate insulators
42.
Process-based compact modeling and analysis of silicon-on-insulator CMOS devices and circuits, including double-gate MOSFETs
43.
Advanced characterization of double-gate (gate-all-around) devices and circuits
44.
Double-gate, tri-layer, and vertical ZnO TFTS and circuits
45.
Physical and Compact Modeling of Vertical and Lateral Tunnel Field Effect Transistor
46.
Research On The Application Of Nano-Multi-Gate Negative Capacitance Transistor
47.
Research On Negative Capacitance Junctionless Field Effect Transistor
48.
Research On The Model And Electrical Characteristics Of Three-dimensional Metal-oxide-semiconductor Field-effect Transistor
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