Font Size: a A A
Keyword [design for test]
Result: 1 - 20 | Page: 1 of 4
1. Research On The Design Optimization Techniques For System-On-Chip Testing
2. Method Of Validation And Test Of DSP And Platform Design
3. The Research On Low Power Built-in Self-test Design
4. Research Of High Performance, Low Power Design For VLIW Architecture Digital Signal Processor: Prototype, Algorithm & Implementation
5. Ic Low-power Built-in Self-test Technology
6. Studying Of Design-for-Test For Embedded IP Cores
7. The Verification And Test Of Satellite Data Receiving Chip IPoD For DVB
8. Research On Technology Of Boundary-Scan Test Of Mixed-Signal Circuit Based On IEEE1149.4 Standard
9. Research And Implementation Of Design-For-Test And On-Chip-Debug Of Embedded Processor
10. The Design For Test And Implementation Of Microprocessor
11. Research On Design For Test Methodology For Core Based SOC Architecture
12. A Research About System-On-Chip's(SOC) Design For Test
13. Study Of Embedded Memory DFT Algorithm Based On BIST
14. Research On Circuit Fault Diagnosis And Low-Power Test
15. Two-Stage Scan Architecture For Low Power Path Delay Fault Scan Testing
16. The Research And Simulation Of Embedded RAM Testing
17. Scan Insertion And Physical Implementation For Multi-media Demodulation Chip
18. Design Of JTAG Controller
19. The Design Of BIST For Mixed-signal Circuits Based On The Functional Test
20. VLSI Auto Testing And Design For Test
  <<First  <Prev  Next>  Last>>  Jump to