delay-locked loop - Globe Thesis

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Keyword [delay-locked loop] Result: 1 - 20 \| Page: 1 of 4
1.	Research And Design On High-speed Time-interleaved Analog-to-digital Converter
2.	Quantization Noise Reduction Technique For Delta-sigma Phase-locked Loop And Delay-locked Loop
3.	Design Of GPS Receiver Based On DSP Technology
4.	Research And Implementation Of A DLL Based High Frequency Clock Generator
5.	Research Of Clock Deskewing And Clock Phase Optimization
6.	Research On Symbol Synchronization In WiMAX
7.	Design Of Clock Network Based On DLL In FPGA
8.	The Research And Design Of Delay Locked Loop Based On High-powered FPGA
9.	The Research And Implementation Of DLL In PHY Of DDR3 SDRAM Controller
10.	Design And Research On Multi-phase Digital Delay Locked Loop
11.	Research And Implementation Of A DLL Based On Multiphase-Clock Generator
12.	The Built-in Self-test For Embedded DLL
13.	Design Of DLL Based Multiphase Clock Generator
14.	Research And Design Of FPGA Delay Locked Loop Architecture
15.	A Design Of 10-bit High-speed CMOS Pipelined ADC
16.	Design And Implementation Of Clock Generator In High Speed ADC
17.	Design Of Clock Generator Based On Delay-Locked Loop
18.	Research And Design Of High-performance Transceiver
19.	All-digital Delay-locked Loop In The Fpga Design
20.	Fast Frequency Hopping System Synchronization Tracking Algorithm
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