Keyword [cell library] Result: 21 - 40 | Page: 2 of 3 21.  The Design Of Standard Cell Library Based On The SMIC0.18um EEPROM Process 22.  Automatic Layout Generation Of FPGA 23.  OPC Optimization Design Method Based On Nanoscale Technology Standard Cells 24.  The Design Of Low Leakage Power Standard Cell Package Based On The Dual Logic Mapping Technology 25.  The Design Of Standard Cells In40nm 26.  The Design Of Single-rail MOS Current Mode Logic Standard Cells 27.  FPGA Architecture Library Generation And Verification 28.  Design And Implement Of A 0.18μm Radiation-Hardened Standard Cell Library 29.  Research On The TFET Cell Library Design Technology 30.  An Improved Standard I/O Cell Library And ESD Design Based On 40nm Process Technology 31.  Design Of 40nm Standard Cell Library For 0.6V Low Voltage 32.  SoC Low Power Design And Implementation Based On Multi-Bit Flip Flop 33.  Super-threshold Standard Reed-Muller Logic Cell Library And Dual Logic Mapping 34.  Design And Implementation Of A Circuit For Testing The Performance Of Standard Cell Library 35.  Low Power Design Of 40nm Standard Cell 36.  The Design And Verification Of Radiation Hardened Standard Cell Library Based On The SMIC0.13?m Process 37.  Design And Research Of Digital Circuits Based On Near-/Sub-threshold Standard Cell Library 38.  TDC Module Design For TOF Chip Using SMIC 0.13?m Customized Process Standard Cell Library 39.  Design Of Low-leakage Standard Cell Library In Near-Threshold Region 40.  Reliability Design For Digital Circuit Working At Minimum Energy Point   <<First  <Prev  Next>  Last>>  Jump to

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