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Keyword [Viterbi decoding]
Result: 81 - 95 | Page: 5 of 5
81.
802.11ax Receiver Hardware Design And Implementation And Module Optimization
82.
The Research And Application Of Voice Wake-up With Deep Learning
83.
Design And Implementation Of Heterogeneous Multi-core System For Wireless Receiver Of Large-scale Neuron Activity Signals
84.
Research On Synchronization Technology In Digital Communication System
85.
Design And Implementation Of Convolutional Code For Small Satellite User Terminal Based On FPGA
86.
Optimized Jamming Against Convolutional Code And Its Anti-Jamming Scheme
87.
Design And Implementation Of NB-IoT Downlink Broadcast Channel Codec
88.
An adaptive threshold strategy for soft decision Viterbi decoding
89.
FPGA design and implementation of systolic array-based Viterbi decoders
90.
Algorithms and architectures for high-speed Viterbi decoding
91.
Research And Design Of High Performance Multimode Viterbi Decoder
92.
Research On Channel Coding And Decoding Technology In Millimeter Wave High Speed Communication
93.
Design And Implementation Of Configuration Memory SEU Tolerant Viterbi Decoders In SRAM Based FPGAs
94.
Implementation Of Super-FEC Based On ISDB-T Standard
95.
Research On Coding And Decoding Algorithm Of Space-time Trellis Code For MIMO System
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