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Keyword [Test Pattern]
Result: 61 - 74 | Page: 4 of 4
61.
New built-in self test methods for scan designs
62.
Synthesis of testable core-based designs
63.
Fast static test compaction and its application to test generation for synchronous sequential circuits
64.
Test pattern generation and test application time reduction algorithms for VLSI circuits
65.
Maximizing nontarget defect detection using conventional stuck-at fault-based automated test pattern generation tools
66.
Methodology of partitioning and exhaustive test pattern generation for builtin self-testing of VLSI circuits
67.
On the computation of LFSR characteristic polynomials for one-dimensional and two-dimensional test pattern generation
68.
Research On The Method By Using Hidden Markov Model To Control The Testing Temperature Of Integrated Circuits
69.
Research And Implementation Of UVM Verification Platform Based On AMBA Bus
70.
Research On High Performance Test Techniques For ARM Core SOC Electric Meter Chips
71.
Research On Scan Test Method Based On MPU Design For Test
72.
Research On Memory Testing Technology And Engineering Application In Secondary Screening
73.
Flash Memory Test System Design And Implementation
74.
Research On 3D Flash Test Pattern Based On Error Mode
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