Test Generation - Globe Thesis

Keyword [Test Generation] Result: 121 - 140 \| Page: 7 of 8
121.	Automatic test-case generation from formal models of software
122.	Alternate test generation for detection of parametric faults
123.	On methods to improve test generation efficiency and test response compaction
124.	Automated test generation from formal specifications of real-time reactive systems
125.	Automatic test generation techniques for sequential circuits
126.	Combinational test generation for sequential circuits
127.	Comparing the effectiveness of automated test generation tools 'EVOSUITE' and 'Tpalus'
128.	Techniques for high-level testability analysis and optimization
129.	Test generation for fault isolation in analog and mixed-mode circuits
130.	Transparency-based hierarchical testability analysis and test generation for register transfer level designs
131.	Formal modeling and test generation automation with Use Case Maps and LOTOS
132.	Fast static test compaction and its application to test generation for synchronous sequential circuits
133.	Automating test generation for discrete event oriented real-time embedded systems
134.	Regressive model approach to the generation of test trajectories
135.	An automatic test generation system for testing virtual memory operations
136.	Crosstalk fault test generation and hierarchical timing verification in VLSI digital circuits
137.	Siddhartha: Domain-specific unit test generation for 'low-testibility' programs
138.	Hierarchical sequential test generation for large circuits
139.	Testability analysis for mixed analog-digital circuit test generation and design for test
140.	A global test generation system for sequential circuits
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