Keyword [Successive approximation register analog-to-digital converter] Result: 21 - 40 | Page: 2 of 3 21.  Research On Key Technologies Of The Novel Hybrid CMOS Successive Approximation Register Analog-to-digital Converter 22.  Design And Simulation Of A Low Power Successive Approximation Register Analog To Digital Converter 23.  A 14-bit Analog-to-Digital Converter With On-Chip Self-Calibrated Reference Voltages For Remote Sensing Application 24.  Calibration And Implementation Of A High Resolution Successive Approximation Register Analog To Digital Converter 25.  Design Of 12-bit Successive Approximation Register Analog-to-digital Converter 26.  Design Of 10-bit Low Power Successive Approximation Register Analog-to-digital Converter 27.  Design Of 10bit 200KS/s Low Power SAR ADC 28.  Research On Key Technology Of Successive-Approximation-register Analog-to-Digital Converter (SAR ADC) 29.  Research And Design Of Digital Calibration Technique For Pipelined Successive Approximation Analog-to-Digital Conversion 30.  Design And Research Of High-speed Successive Approximation Register Analog-to-digital Converter 31.  Research On High-Order Noie-Shaping Successive Approximation Register Analog-to-Digital Converter 32.  Research On Nano-scale High Resolution Pipelined Successive Approximation Register Analog-to-digital Converter 33.  Research And Design On 20MS/s 12bits Successive Approximation Register Analog-to-Digital Converters 34.  Design Of A 16-bit Low Power SAR ADC 35.  Research And Design Of Key Technologies For Low-voltage And High-efficiency Analog-to-digital Converters 36.  Research On Structure And Circuit Technology Of Low Power Successive Approximation Register Analog-to-Digital Converter 37.  Research On Structure And Circuit Technology Of High-speed Successive Approximation Register Analog-to-Digital Converter 38.  Research On High Level Models And Circuit Technologies Of Noise Shaping Successive Approximation Register Analog-to-Digital Converter 39.  A Research Of Novel Incremental Noise-shaping Successive Approximation Register Analog-to-Digital Converter 40.  Research And Design Of A SAR ADC With Capacitor Mismatch Calibration   <<First  <Prev  Next>  Last>>  Jump to

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