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Keyword [Single-Event Upset(SEU)]
Result: 1 - 13 | Page: 1 of 1
1. Study Of Universal Memory Single Event Effects Test System
2. Resistance To Single Event Upset Of Sram-based Fpga Test System Research And Design,
3. An Ultra Low Power Fault Tolerant SRAM Design
4. Research On Single Event Upset Effect Simulationand Verification Technologies
5. FPGA Design And Implementation Of Spacecraft EDAC System Based On TMS320VC33Development Platform
6. Study Of Single Event Effects On SOI FINFET Device And SRAM Cell
7. Research On Single Event Upset And Its Induced Soft Error Of Nano SRAMs
8. A Study Of FPGA Protection Methods For Alleviating The Influence Of Soft Errors
9. Design And Implementation Of A Lossless/Near-Lossless Image Compression System On Satellite
10. Radiation Reliability Of Novel MOSFET And TFET Devices
11. Research On Hardened Design For Memories Against Seu Based On Error Correction Codes
12. Research On Single Event Effect Of 3D Packaging ICS Based On TSV Interposer
13. Study On Single-event Effect Of 28nm FDSOI Transistor And Cell Circuit
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