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Keyword [Preamplifier-latch]
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1. Design Of Some Key Cells Of High Speed High Resolution Pipelined ADC
2. Study Of A Low Power Dynamic Comparator Based On Successive Approximation Register Converter
3. An Ultra High-speed Comparator In 0.18μm CMOS
4. The Design Of High-speed Low-power Comparator
5. .10 Bits The 100msps Pipelined Adc System Structure Optimization And Part Of Unit Design
6. For 10bit The 100msps Pipelined Adc Sub-adc Research And Design,
7. .3 G Receivers Adc Sub-unit Design And Error Correction Method
8. Design Of A 12 Bit Successive Approximation Register ADC In SoC System
9. Research Of High Speed And Low Power Comparator
10. Design Of A12Bit Capacitive Successive Approximation Adc
11. Research And Implementation Of SAR ADC For Wideband Wireless Communication System
12. Design And Implementation Of 12bit SAR ADC For High Temperature MEMS Accelerometer
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