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Keyword [Min-sum Algorithm]
Result: 21 - 40 | Page: 2 of 3
21. Research On Decoding Performance Of RS Codes Based On Normalized Min-sum And Sphere Decoding
22. Key Technology Research And Simulation Analysis Based On WIMAX Physical Layer
23. Research Of PCGC Codes Algorithms And FPGA Implementation
24. Design Of Encoder And Decoder Of IRA-LDPC Codes Based On Residue Class Pairs
25. Research Of LDPC Encoding Decoding System Based On FPGA
26. Research On Low Complexity Decoding Algorithms For LDPC Codes
27. Study Of Dual Normalized Min-sum Algorithm And Its Partial Parallel Architecture
28. Improvement And Performance Analysis Of LDPC Decoding System Based On Sum-product Algorithm
29. Research On Decoding Of Raptor Codes Over The AWGN Channel
30. Design And FPGA Implementation Of Full-Rate High-Speed LDPC Decoder Compatible With DVB-S2X Standard
31. Study On Parallel Decoders Of LDPC Codes And CUDA-based Implementation
32. Efficient FPGA Implementation Of LDPC Encoder And Decoder In NGB-W System
33. Reserch On Two Improved Decoding Algorithms Of Polar Codes
34. FPGA Design And Implementation Of Binary And No-binary LDPC Decoder
35. Research And Implementation Of Layered-Full-Parallel Decoder Of QC-LDPC Codes
36. Design And Implementation Of Non-binary LDPC Encoder And Decoder
37. LDPC Codec And Its FPGA Implementation
38. Research And Implementation Of High Coding Gain LDPC Decoding Technology For Wireless Optimal Communication
39. Designs Of LDPC Decoder Architectures For NAND Flash Memory
40. Key Technology Design And Verification Of CCSDS Multi-code Channel Encoding And Decoding
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