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Keyword [Latch]
Result: 121 - 138 | Page: 7 of 7
121.
The Research On Method Of Soft Error Protection For Nanoscale Integrated Circuits
122.
Design And Research Of Nanoscale CMOS Latch Against Multiple-node Upset
123.
Research And Circuits Design Of Several Types Of Flip-Flop Based On Hybrid CMOS-Memristor
124.
Research On Hardened Latch Designs For Anti-Single Event Upset In Integrated Circuits
125.
Research And Design Of ESD Protection Devices Based On SCR And LDMOS
126.
Research On Novel IGBT Structures Utilizing Germanium Silicon Material
127.
Single Event Effect Study And Hardened Design Of 65nm Bulk CMOS Process Latch Circuit
128.
Multiple-Node-Upset-Tolerant Latch Designs Based On Re-Convergence And Filters
129.
Soft-Error On-Line Self-Recoverable Fault-Tolerant Designs For Latches
130.
Design And Research Of Hardened Latch With Multi Node Upset Tolerance In Nanoscale
131.
Design Of Scan Chain Security Circuit Based On SDSFF Latch
132.
The Design On Ultra Large CIS Sequential Circuit And Research On Circuit Reliability
133.
Study On Secure And Reliable Active IC Metering Technology
134.
Research On ESD Protection Devices Based On 21nm Advanced Technology
135.
Research On Short Circuit Robustness And Process Optimization Of 1200V Trench Gate FS IGBT
136.
Time-to-Digital Converter Based On Rotary Traveling Wave Oscillator
137.
Research On Design Technology Of True Random Number Generator And Physical Unclonable Function Based On FPGA
138.
Research Of Key Circuits In High-speed High-precision Pipelined ADC
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