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Keyword [High Level Synthesis]
Result: 41 - 60 | Page: 3 of 7
41. Design And Implementation Of Real-time Motion Analysis System Based On ZYNQ Heterogeneous Structure
42. Multi-mode LDPC Decoder Design And Prototype Verification
43. Study On The Computing Platform Of Core Technique For Energy Saving Big Data Center
44. The FPGA Design And Implementation Of A Multivariable Public Key Cryptosystem With Fractional Step Decryption
45. Design And Implementation Of HLS-based Multi-axis Control System
46. Research And Implementation Of Real-time Video Mosaic Technology Based On Zynq
47. Wideband Radar Channel Signal Processing
48. Code Transformation-based High-level Synthesis Optimization Method For FPGA And Applications
49. New Algorithm For Memory Partitioning Based On FPGA
50. Security Issues Of Outsourcing Of IC Manufacturing
51. Embedded Implementation And Algorithm Optimization Of Gesture Recognition Based On Convolutional Neural Network
52. Research On Optimization And Application Of High Level Synthesis Scheduling Algorithm Based On LegUp
53. Realization Of Binocular Vision Measurement Method Based On Zynq Platform
54. Research On Key Techniques Of Deep Convolutional Neural Network Accelerators Based On FPGA Bus Framework
55. Design And Implementation Of Configurable Efficient Coding And Decoding IP Cores For LDPC Codes
56. Design Of Signal Preprocessing Circuit For Infrared Focal Plane Array Detector
57. Research On ZedBoard Implementation Of Low Bit Rate Speech Algorithm
58. Research On Binocular Stereoscopic Vision System Based On Zynq SoC
59. Implementation And Verification Of G.729 Speech Decoding Algorithm Based On FPGA
60. Research On Automatic Data Placement For CPU-FPGA Heterogeneous Multiprocessor System-on-chips
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