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Keyword [Full-custom]
Result: 81 - 100 | Page: 5 of 6
81. Low Power SRAM Design And Implementation In X-DSP
82. A Security SRAM Against Data Remanence Attack With Full Custom Design
83. The Full Custom Design Of High Speed Low Power SRAM Under 65nm Process
84. The Design And Implementation Of Memory With Function Of Verification
85. Full Custom CAM Design Using New Cell And Match Line
86. High-performance, Low-power Multi-port Register File With Full Custom Implementations
87. A Custom Design Of Adder For DSP Hard IP Core
88. The Research For Full-Custom Layout Design Of Vlsi FPGA Chip Under DSM Condition
89. Based On The 65 Nm Process Register Pile Design Technology Research
90. The Study And Implementation Of Automatic Timing Modeling Techniques For Full-Custom Macro Blocks
91. Physical Design Of YHFT-DX L2Cache In65nm Process
92. Full Custom Design And Realization Of Static Random Access Memory IP Core
93. Design Research Of Low Power Consumption Random Number Generator
94. Full-custom Design And Implementation Of Multi-port Register File In40nm Process
95. Exact Timing Modeling Techniques For Full-custom Research And Design
96. The Design Of Two-Mode Matrix Transpose Memory In 40nm Process
97. The Full-custom Design Of FPGA Programmable Logic Blocks Based On 65nm Technics
98. Design Of Key Modules In RF Frequency Synthesizer For Wireless Sensor Networks
99. Back-end Design And Implementation Of Anti-fuse FPGA
100. The Full-custom Design And Implementation Of High-performance DSP Hard Core
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