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Result: 21 - 27 | Page: 2 of 2
21.
Design And FPGA Implementation Of Full-Rate High-Speed LDPC Decoder Compatible With DVB-S2X Standard
22.
Research On Key Technologies Of Received Combining For MIMO Relaying Systems
23.
Research And Design Of 25Gb/s Reference-Less Full-Rate CDRs In 40nm CMOS Technology
24.
Research And Design Of Full-rate Multipattern Pseudo-random Binary Sequence Generator In 40-nm CMOS
25.
Design techniques towards a full-rate 40Gb/s transmitter in 0.18mum CMOS
26.
Linear Dispersion Based Research On Space-Time Coding Theory And Applications
27.
Design Of 40Gbps Full Speed Clock And Data Recovery Circuit
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