Font Size:
a
A
A
Keyword [Floating-point Multiplier]
Result: 1 - 10 | Page: 1 of 1
1.
Research And Design On Low Power Floating-point Multiplier
2.
The Development Of A 32-Bit Floating-Point FFT IP Core Based On FPGA
3.
Research On 32 Bit High-Speed Floating-Point Multiplier Design
4.
Research And Implementation Of Key Techniques Of High Performance Floating-Point Unit Designs
5.
The Research And Implement Of The High Performance Floating-Point Multiply, Add Unit
6.
A Design Of High-Performance Multiplier
7.
Studies On Real Time Signal Processing Techniques For Multibeam System
8.
The Design And Implementation Of Floating-point Multiplier For YHFT-DX
9.
Design And Implementation Of Double-precision 64-bit Floating-point Multiplication Unit
10.
Design and implementation of a floating point multiplier using Altera's design environment and FPGA
<<First
<Prev Next>
Last>>
Jump to