Keyword [FPGAs] Result: 61 - 80 | Page: 4 of 8 61.  Investigation of leakage reduction techniques for field programmable gate arrays 62.  Optimizing scalar multiplication for Koblitz curves using hybrid FPGAs 63.  Reliability- and variation-aware placement for field-programmable gate arrays 64.  Architecture and CAD techniques for optimizing FPGAs and reliability of integrated circuits 65.  Networks-on-Chip based high performance communication architectures for FPGAs 66.  Efficient algorithm and architecture for implementation of multiplier circuits in modern FPGAs 67.  Hardware/software optimizations for elliptic curve scalar multiplication on hybrid FPGAs 68.  Circuits, Architectures, and CAD for Low-Power FPGAs 69.  Characterization of Interconnection Delays in FPGAs Due to Single Event Upsets and Mitigatio 70.  Compiler transformations for automatic generation of VHDL from C for code acceleration on reconfigurable devices 71.  Compiled acceleration of C programs on FPGAs 72.  A low-cost processor-based logic emulation system using FPGAs 73.  Design methodologies and CAD tools for leakage power optimization in FPGAs 74.  A novel partial reconfiguration methodology for FPGAs of multichip systems 75.  Study of hardware and software optimizations of SPEA2 on hybrid FPGAs 76.  Efficient architectures for MLP-BP artificial neural networks implemented on FPGAs 77.  Incorporating physical information into clustering for FPGAs 78.  Scalable moduli multiplier designs for cryptographic applications folded in FPGAs 79.  Enhancing routing architecture and routing algorithm for improving FPGAs' performance 80.  Architectural optimizations and synthesis tools for improved energy efficiency and faster design closure for FPGAs   <<First  <Prev  Next>  Last>>  Jump to

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