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Keyword [Deblocking filter]
Result: 41 - 60 | Page: 3 of 4
41. Hardware Design Of Intra Prediction And Deblocking Filter In H.264/AVC Video Decoder
42. Design And Optimization Of H.264Deblocking Filter Based On FPGA
43. The Research Of Procedure-level Dynamic Reconfigurable Computing Technology For High Definition Television’s Application
44. Realization And Optimization Of H.264Intra Prediction And Deblocking Modules Based On Multi-Core Processors
45. Research On In-loop Deblocking Filter For High Efficiency Video Coding
46. Vlsi Design Of Inverse Transform Inverse Quantization And Deblocking Filter In The H.264Decoder
47. H.264-based Android Platform Streaming Media Decoder Research And Design
48. An In-Loop Filter Based On Human Visual System
49. Hardware Design Of Key Modules In HEVC Encoder For Real-time Ultra-HD Applications
50. The Optimization And Implementation Of Low-complexity Codecs For High Efficiency Video Coding
51. Video Codec Parallel Algorithm Based On Multi-core Processors
52. A H.264 Deblocking Filter Design And Its HW/SW Co-simulation
53. Research And Design Of H.264/AVC-based Video Decoder
54. Parallel Optimization Of Deblocking Filter In VP9Decoding
55. Research Of Video Decoding Accelerated Method On Reconfigurable Multi-core Processors
56. Research And Implementation Of HEVC Multi-Level Decoding Algorithm Based On Tilera Multi-Core Processor
57. The Research And Design Of Critical Algorithms In Video Codec Based On FPGA
58. A Deblocking Filter Module With Hybrid Filtering Schedule Of H.264 Video Coding
59. A Research Of Multi-function Switched-beam Antenna Array
60. Research On Next Generation Video Coding Technology Based On HEVC
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