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Result: 1 - 15 | Page: 1 of 1
1.
The Research On Dynamic Reconfiguration System And Its Bit-Width Management For Loop Computations
2.
Research On Bit-width Optimization With Affine Arithmetic
3.
Fault-Tolerant And Low-Power Coding-Decoding Design Based On Network On Chip
4.
Research On Optimization Of Software Radio Signal Transmission In Parallel DC/DC System
5.
Research On High-efficient Of Polar Codes Hardware Decoder
6.
The Design Of Energy-Efficient DNN Accelerator Based On Hybrid Bit-Width Approximate Calculation
7.
Bit-width And Sparsity Adaptive Accelerator Research And Design For Convolution Neural Network
8.
Accuracy Controllable BCNN VLSI Architecture And Circuit Design For Common Word Recognition
9.
The Design And UVM Verification Of Ethernet Based Physical Media Additional Layer Interface Chip
10.
On Optimizing the Performance of Interference-Limited Wireless System
11.
Research On FPGA Acceleration Technology Of Feature Extraction In Visual Inspection
12.
Design And Implementation Of Dynamic Bit Width Adjustment Technology In Artificial Intelligence Processor
13.
Algorithm Design And Implementation Of Transcendental Acceleration Unit
14.
Study Of Low Bit-width Quantization Of Deep Convolutional Neural Network
15.
Research On MobileNet V3 Based Low Bit Width Customizable Computing
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