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Research And Implementation Of A Wideband Parallel Digital Predistortion Method

Posted on:2022-11-20Degree:MasterType:Thesis
Country:ChinaCandidate:X H WangFull Text:PDF
GTID:2518306764480924Subject:Automation Technology
Abstract/Summary:PDF Full Text Request
Digital predistortion(DPD)technology linearizes the power amplifier according to the nonlinear distortion information in and out of band of power amplifier.Therefore,the DPD technology needs to receive data within several times of signal bandwidth to have good correction performance.The continuous growth of transmitting signal bandwidth in wireless communication system,such as low orbit satellite communication bandwidth,generally in the range of several hundred megabytes,makes DPD system need to work under high sampling rate,which brings great challenges to hardware implementation.To solve this problem,this paper proposes a parallel digital predistortion method for wideband signals,which can increase the DPD processing speed several times without sacrificing the correction performance and greatly increasing the algorithm complexity.The main work contents are as follows:1.The theoretical analysis of parallel digital predistortion method is completed.Firstly,the structure and nonlinear behavior model of parallel digital predistortion system are analyzed.The system structure mainly includes wideband source module,parallel DPD actuator,synchronization module and parameter training module.Then,the algorithm and structure of parallel DPD actuator,which is the key point of parallel digital predistortion system,are derived,including memory storage and parallel DPD processing.Finally,the parameter training algorithm in the system is analyzed and selected.2.The floating point and fixed point link simulation of parallel DPD method are completed.Firstly,the whole link simulation scheme is given,and the function of each module in the system and the connection between modules are explained.Then,the link of each module was built and its function was tested,and the system function was realized by connecting each module.The correctness of the parallel DPD method was verified according to the floating point simulation results,and the correction performance of the parallel DPD method was analyzed.Then the fixed-point simulation link is built to analyze and determine the fixed-point bit width of each module.Finally,the data errors of floating point and fixed point calculation results of each module are counted,and the influence of fixed point on simulation results is compared with the floating point simulation results,which can be used as a guide for the subsequent digital logic design.3.The digital logic design of parallel DPD method is completed.Firstly,the wideband source module and the parallel DPD actuator,which require high processing speed,are designed as parallel structures,which process multiple data points in a clock cycle,and the other modules are designed as serial structures.Then complete the toplevel structure design of each module in the system,determine the digital logic design ideas of each module.Finally,all modules are connected to realize system functions,and the simulation results of Vivado are analyzed.When the baseband signal sampling rate is2.4Gsps and the bandwidth is 750 MHz for 128 QAM wideband signal,the method reduces the adjacent channel power leakage of the output signal by about 8.5d Bc.In this paper,a parallel digital predistortion method for wideband signals is proposed.The correctness of the proposed method is verified by theoretical analysis,link simulation and digital logic design.The research results have great guiding significance for digital predistortion processing and hardware implementation in wideband communication of low orbit satellite.
Keywords/Search Tags:Digital Predistortion, Wideband Signal, Parallel Processing, Memory Polynomial Model, Cell of Calculating Polynomial
PDF Full Text Request
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