Digital-predistortion Polynomial Implemented On Fpga

As people are increasing aware of saving energy, the power-efficient products are getting more and more concerning, especially in communication, people are pay more emphasize on the those power-efficient products. Whatever in the traditional communicational systems or current 3G,4G, the radio frequency Power Amplify (PA) is absolutely unnecessary, but as it is inherently nonlinear, and thus it efficiency is low. For improving the linearity and enhancing the efficiency of PA, a lot of methods have been researching. Digital Predistortion (DPD) technology is one of those most effective and promising. As researchers are improving their understanding on this technology, it is become more hopeful. Digital Predistortion (DPD) can efficiently inhibit the non-linearity resulting in the bad Adjacent Channel Leakage Power Ratio and increase the efficiency of PA, and also decrease the volume of the communication system and therefore reduce the capital expenditure and operation expenditure. When the PA runs at its saturation, the nonlinearity becomes more obvious and ACLR of the system and EVM is getting worse. It becomes even worse in the wideband communication systems-Wideband Code-division Multiple Access (WCDMA),Wideband Orthogonal Frequency-Division Multiplexing (WOFDM). Linearizing the PA need us thoroughly research on the model of current radio frequency power amplify widely used in current communication systems. In the past, the PAs were thought as memoryless, it is defective to improve the efficiency of the PA by this model and cannot supply the demand. As the developing of the research on the PA's memory effect, the increase of the PA'efficiency is improved.In this article, firstly we briefly introduce the current common PA models and compare the complexity and feasibility of realization of each model. According to the need of practical systems, we chose the memory-polynomial model.As the developing of the semiconductor technology, the performance of Field Programmable Gate Array (FPGA) has improved considerably. Because of many excellent characters- high capacity, low power efficiency, mass storage, able to be programmed and like, FPGA has been widespread used, especially in the communication systems, many high frequent process units are needed, so FPGA has become absolutely necessary. This article focus on implementing the memory-polynomial model of DPD using FPGA and ameliorating the mode1 corresponding to the Doherty PA which is used widely in the current 3G systems, at last, we propose the "sequence interval memory polynomial model".Finally, the simulation results of FPGA and relevant Matlab is presented, and the last conclusion tested on our platform are also provided.