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Research On Gate Drive Technology Of Gallium Nitride Power Devices

Posted on:2022-07-07Degree:MasterType:Thesis
Country:ChinaCandidate:S L ChengFull Text:PDF
GTID:2518306740451784Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
GaN power devices have the characteristics of high efficiency,low power loss and high power density,so GaN is widely used in power electronics.However,in GaN power devices driving process,the gate driving circuit not only has many problems of driving signal lock and trigger by mistake due to reverse current freewheeling,negative voltage and switching interference in deadtime,but also faces the challenge of power conversion efficiency decline.Focusing on the levelshifter and deadtime control in the gate driving chip of GaN half-bridge converter,this thesis researches on extending deadtime negative voltage range,improving the anti-interference ability and constructing the digital deadtime control ability.The main work includes the following two aspects:Firstly,by studying the characteristics and application scenarios of GaN power device and the GaN gate driving technology theory,analyzing the problems of traditional levelshifter and deadtime control,this thesis designs the novel levelshifter of GaN power device driver,deduces the key design equation and explains structure and principle.Meanwhile,this thesis analyzes the interference of half bridge output voltage jumping in the circuit,and designs a false eliminating circuit.The layout is designed and post-simulation is safely accomplished in this thesis.By comparing the pre-simulation and post-simulation results,it is proved that this levelshifter works well in the 5MHz 100 V half-bridge buck converter.When the output node of the half-bridge power level is VSSH=-3V and VSSH= 100 V,the typical model delay is 4.5ns and 1.5ns,respectively.Then,this thesis analyzes the requirements of the deadtime control circuit for GaN power device driver,deduces the conditions that the deadtime control circuit needs to conform,explains the research of the deadtime control circuit architecture principle,and puts forward a deadtime control method.And this paper studies the control of the deadtime through the I2 C interface to control the output deadtime of the circuit,and the optimal deadtime under a specific load.At the same time,the hybrid simulation of the circuit is carried out to verify the function.And I2 C code is synthesized,placed and routed.The proposed deadtime control circuit is put into a 5MHz 100 V buck half-bridge converter for simulation.The simulation results show that the proposed deadtime control circuit can work normally.The deadtime control circuit can adjust the deadtime between 2ns and 10 ns with a minimum accuracy of 0.5ns.
Keywords/Search Tags:GaN, Level shifter, Deadtime control, Driver circuit
PDF Full Text Request
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