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Design And Implementation Of OpenCL Host Framework Based On Heterogeneous Embedded Environment

Posted on:2022-01-01Degree:MasterType:Thesis
Country:ChinaCandidate:S T WangFull Text:PDF
GTID:2518306725479654Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
The research on heterogeneous systems can be traced back to 40 years ago when general-purpose processors just stepped onto the stage of history.The use of dedicated hardware units to handle tasks that they are good at,that is,computing under a heterogeneous architecture,has become a more reasonable pursuit in today's era when the demand for computing power is skyrocketing.The hardware needs software to command to work.The Open CL specification proposed and released by Khronos is such a programming standard and environment suitable for multiple heterogeneous devices.This paper proposes a host-side program architecture that supports Open CL to build a set of heterogeneous platforms where the host-side(CPU)and the device-side(FPGA)communicate through Serial Rapid IO(SRIO).First,it analyzes the content and characteristics of the Open CL standard and serial Rapid IO,combined with the characteristics of the FPGA parallel architecture,clarifies the system requirements,defines the packet format of the communication between the master and the slave through the Rapid IO,and gives the overall design framework of the system.Second,based on the communication foundation and environment of the embedded platform,through understanding and learning the board support package of the Vx Works system,the Open CL standard API is realized from the bottom to the top using the underlying communication interface.A heterogeneous platform development environment conforming to the Open CL standard is built,Open CL driver is implemented in the Vx Works operating system,and a processing and development framework for host-side programs is provided.Based on the design of device control,memory management,task distribution,etc.,the system requirements of controlling 4FPGA slave devices and multiple execution cores through a single-chip host processor based on Open CL technology are realized.Finally,the functional test and verification were carried out through the test environment.First,test the overall stability of the host-side program;second,use the radar signal processing kernel example to evaluate and analyze the host-side system in a variety of scenarios,and achieve ideal test verification results.
Keywords/Search Tags:OpenCL, Heterogenous Computing, FPGA, RapidIO
PDF Full Text Request
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