Influence Mechanism Of Etching On Interface Characteristics Of SiC MOS

With wide band gap,high breakdown voltage and high thermal conductivity,silicon carbide(SiC)has the potential to produce high-power electronic devices with functions far superior to silicon(Si)semiconductor.SiC is a very attractive semiconductor material for high power electronic devices due to its excellent physical properties such as wide band gap,high breakdown voltage and high saturated electron drift speed.Due to the extremely low channel mobility in SiC MOSFET,it is not satisfactory to prepare SiC MOSFET with low on-resistance.It has been suggested that the deterioration of Si O₂/4H-SiC interface quality reduces the channel mobility,which is about one order of magnitude higher than that of silicon MOSFET.The area of the SiC/Si O₂interface using the groove-gate MOSFET structure is reduced,which can effectively reduce the influence of interface states on the device.Since the SiC in the grooved MOSFET will undergo etching before the oxide layer grows,etching will increase the roughness of SiC and then increase the density of interfacial states,it is very important to study the effect of etching on the interfacial states for the preparation of high-performance 4H-SiC MOSFET.Based on the preparation technology of SiC MOSFET,this paper developed SiC etching and ion implantation technology.The main research contents and conclusions of this paper are as follows:1.The development status of SiC MOSFET,SBD and other devices at home and abroad and the conditions restricting their performance are investigated;The current passivation methods for reducing the interstate density and improving the interstate quality are reviewed.It is found that NO annealing has excellent interstate stability while reducing the interstate density.It is one of the most popular methods for post-oxidation annealing of commercial silicon carbide at present.2.The silicon carbide grooves were etched using ICP etching process.The experiment shows that the microgrooves can be improved by the process conditions,and the grid groove structure with smooth bottom and vertical side wall is obtained.The better groove etching technology at this stage is explored,which can be used to optimize the preparation of silicon carbide MOSFET devices.3.The SiC SBD flow plate experiment was carried out according to the experimental scheme,and the samples were tested and verified to analyze the influence of ion implantation on the forward pass and breakdown voltage of SBD.The experimental results show that the SBD with lower energy injection has better breakdown performance,and the reverse breakdown voltage can reach 1200V,which is suitable for SiC ion implantation process.4.Test commercial silicon carbide devices to get the breakdown voltage and output characteristics of the devices,study the influence of different device structures on silicon carbide devices,and analyze the foreign advanced silicon carbide device technology level.Finally,it is found that Cree's channel-type SiC MOSFET still has excellent conduction performance under the condition of 1200V breakdown voltage,and the channel-type MOSFET used in this device has excellent structure.