Research And Design Of BD-3 GNSS Multi-Frequency Receiver

With the vigorous development of aerospace information technology,the Beidou satellite navigation system independently developed by China has entered the process of globalization in its "three-step" strategy.By the end of 2018,the BD-3 system had begun to broadcast signals on a global scale and began global service.However,since the BD-3 system was designed with a new signal system and partially adjusted in the carrier frequency selection,there are still few satellite receivers that can support the BD-3 system.Based on the hardware architecture of "RF front end + FPGA + ARM",this paper designs a multi-frequency GNSS RF receiver that can support the BD-3system and is compatible with Beidou II and GPS system.The full text is elaborated on the following main contents:According to the characteristics of the L1 signal of the GPS system and the B1 C signal of the BD-3 system,compared with the satellite signal structure of the two systems,a hybrid architecture scheme for the RF front end of the multi-frequency receiver is proposed,and the sensitivity required by the receiver is derived.And noise figure indicator requirements.Focusing on the design of the pre-stage low-noise amplifier,the simulation tool is used to simulate the key parameters such as the balance between the static working point,the optimal noise figure and the optimal return loss,and the subsequent down converter,IF amplifier and The IF filter and other circuits were analyzed and designed.The processing flow of the digital baseband signal of the multi-frequency receiver is analyzed,including the selection of the signal channel,the signal tracking and locking process,the pseudo-code stripping process implemented in the correlator,and the PVT solution.The implementation scheme of baseband signal processing system based on FPGA+ARM is given,and the specific carrier tracking unit and pseudocode tracking unit are designed and implemented in detail.According to the working characteristics of the multi-frequency receiver,the overall design scheme of the receiver power supply is given,and the key parameters of the power network,switching power supply and linear regulator involved are designed in detail.For the special requirements of receiver interface stability,the detailed design of the slow start power interface,anti-reverse circuit and data USB interface circuit are carried out.The system test environment was built,and the receiver RF channel performance index,power supply stability,baseband module function and the whole machine positioning function were verified and tested,and the test results were analyzed.