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Research And Design Of SOC For Human Physiological Parameter Detection Application

Posted on:2021-10-06Degree:MasterType:Thesis
Country:ChinaCandidate:S Y WuFull Text:PDF
GTID:2518306050968629Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
With the progress of technology and social development,people's demand for health is higher and higher,so portable medical equipment such as blood pressure meter,blood glucose meter,ear temperature gun and so on came into being.Most of these devices reflect the physical condition of human body by monitoring the physiological parameters of human body,which can effectively help patients and medical staff to judge the disease of patients quickly.As the essential core of health monitoring equipment,SOC(system on chip)plays an important role in the detection of human physiological parameters.SOC is an integrated chip with embedded system as the core,which integrates hardware and software,and pursues the most inclusive product system.Its performance determines the advantages of health monitoring equipment directly.In summary,this paper designs a SoC system chip for physiological parameter detection application.Based on the reuse technology of IP core,data collection,storage and transmission functions are realized.The working frequency can reach more than30 MHz,which effectively shortens the design cycle and reduces the development cost.The main research work of this paper includes: 1)the overall architecture of SOC chip is studied,and the specific design and implementation scheme of each key module,including the core,bus,peripheral,and interface,is analyzed in detail.The high-level model of SoC system chip is built,and each module designed is simulated and verified by the Modelsim simulation tool to verify the correctness and feasibility of design.2)On the basis of SoC system chip model,FPGA verification is carried out.Synthesis and post simulation are completed by Vivado tool,and the generated bitstream file is downloaded to Nexys A7-100 T demo board for implementation.3)Based on the Grace 180 nm process,the design of some digital back-end is completed,and the logic synthesis is carried out with DC tools.The corresponding area,power and timing reports are obtained.The report shows that the logic synthesis results meet the requirements of setup time.The RTL design of 32-bit SOC proposed in this paper has reserved interface for future design,which can be extended according to practical application,and has certain reference value for the design of SoC system chip for physiological parameter detection.
Keywords/Search Tags:physiological parameters, SOC, EDA simulation, FPGA, logic synthesis
PDF Full Text Request
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