Research On Low Power Column Processing Circuit In CMOS Image Sensor

Lensless imaging system provides a new idea for the realization Of Point Of Care Testing(POCT)Of biological cells.CMOS image sensor is an important component of lensless imaging system.However,the existing CMOS image sensors cannot meet the power consumption requirements of battery-driven cell POCT system,and the heat dissipation problem will have a great impact on the cell imaging quality.Therefore,the research of low-power image sensor is of great significance for the lensless imaging system to realize outdoor rescue and telemedicine.Column processing circuit is the main power source of the CMOS image sensor,and its lowpower implementation technology is studied in this paper.The main research contents include the following four aspects: First,In order to reduce the number of conversions,this paper proposes a method of preset threshold window.After analyzing the quantization method of traditional analog to digital converter(ADC),this method proposes a low-power quantization scheme.In this scheme,the input signal is divided into two parts: effective information and redundant information.In the range of effective information,the ADC quantizes the signal,otherwise it does not quantify and outputs a fixed code value.Especially,in the judgment of the threshold window,only a set of data is needed to determine the effective threshold before each imaging acquisition,and then the low-power quantization is carried out according to the threshold.Second,in order to realize low-power requirements under the premise of maintaining accuracy,the comparator designed in this paper introduces a delay detection method based on the traditional pre-amplifier and dynamic latch structure.This method realizes the control of pre-amplifier opening and closing by detecting the difference of output delay under different input pressure difference,so as to achieve low-power design requirements.Thirdly,the slope generator designed in this paper adopts an integral structure with analog self-calibration module,which solves the influence of slope deviation,and stores the offset voltage of the calibration module by capacitance to suppress the mismatch of the feedback path.In this paper,the low-power column processing circuit is designed and implemented in UMC180 nm CMOS process.The schematic and layout design is completed under 1.8V supply voltage,and the characteristics are verified by simulation.The post-simulation results show that the DNL of the system is +0.4LSB/-0.4LSB,and the INL is +0.55LSB/-0.78 LSB.Under the sampling frequency of 18.2 k Hz/s and the frequency of the input sinusoidal signal of 1.62 k Hz,the ENOB is 9.5bit,and the average power consumption RMS is 89.1μW.