| The concern about energy consumption in current technology node is becoming more serious. As we are already in deep sub-micron era, the relentless process scaling makes existing energy reduction techniques less efficient. It is predicted that we might soon face the situation where most of the silicon area is forced to be dark and can not be powered on simultaneously.;Therefore, this thesis will focus on architecture designs for deploying emerging memories at various levels in the memory hierarchy. (Abstract shortened by UMI.).;As alternative solutions, a number of emerging memory technologies are being actively studied. They allow us to design more energy efficient architectures and potentially solve the dark silicon problem from the ground. However, they also incur certain weaknesses such as high write energy and limited endurance. Previous studies showed that an effective way to mitigate these negative impacts is by optimizing the memory architecture. |
