| Determining the source of failure in a defective circuit is an important but difficult task. Important, since finding and fixing the root cause of defects can lead to increased product quality and greater product profitability; difficult, because the number of locations and variety of mechanisms whereby a modern circuit can fail are increasing dramatically with each new generation of circuits.; This thesis presents a method for diagnosing faults in combinational VLSI circuits. While it consists of several distinct stages and specializations, this method is designed to be consistent with three main principles: practicality, probability and precision. The proposed approach is practical, as it uses relatively simple modeling and algorithms, and limited computation, to enable diagnosis in even very large circuits. It is also probabilistic , imposing a probability-based framework to resist the inherent noise and uncertainty of fault diagnosis, and to allow the combined use of multiple fault models, algorithms, and data sets towards a single diagnostic result. Finally, it is precise, using an iterative approach to move; The diagnosis system is designed to address both the initial stage of diagnosis, when nothing is known about the number or types of faults present, as well as end-stage diagnosis, in which multiple arbitrarily-specific fault models are applied to reach a desired level of diagnostic precision. It deals with both logic fails and quiescent current (IDDQ) test failures. Finally, this thesis addresses the problem of data size in dictionary-based diagnosis, and in doing so introduces the new concept of low-resolution fault diagnosis. |
