The Design Of High-speed Image Transmission System Based On PCIE Protocol

With the continuous improvement of image frame rate and resolution requirements of image acquisition systems,high-speed image transmission technology is indispensable.High-speed image transmission systems are widely used in scientific research,transportation,medical,aerospace and many other fields.Traditional parallel transmission buses have been gradually replaced by high-speed transmission buses due to weak anti-electromagnetic interference capability,large number of pins,complicated wiring,and rate bottlenecks.As the third-generation 10 interconnect bus.PCIE bus has the advantages of high transmission bandwidth,serial point-to-point interconnect architecture,and good PCI bus compatibility.It is widely used in high-speed data transmission.This thesis designs a high-speed image transmission system based on PCIE bus.The Xilinx Artix-7 series FPGA was selected as the platform chip,and the DMA controller,PCIE interface circuit and DDR3 controller were designed.The corresponding PCIE driver and PC host computer software were developed.Finally,stable and high-speed transmission of image information was achieved.This thesis mainly completed the following work:First,based on the requirements of the radar imaging transmission system project undertaken by the laboratory,the overall structure design of the PCIE image transmission system was completed,and the functions of image information collection,control,buffering,transmission and display were realized.Second,the PCIE interface circuit design based on Xilinx IP core was completed in FPGA,and the DMA controller was design ed by using Verilog language to realize DMA mode transmission of PCIF interface,which effectively reduces the CPU occupancy rate during high-speed data transmission.Third,the Verilog language was used to complete the DDR3 controller design,which realizes efficient buffering of image information,and solves the problem of image data distortion and low DMA efficiency caused by small buffer capacity.Fourth,the PCIE driver was developed using WinDriver to implement a large-capacity cache of the SG DMA linked list structure,improving the amount of data for a single DMA transfer and the overall transfer rate of the PCIE.Fifth,in the Visual Studio development environment,the MFC-based PC application was designed,and the PCIE transmission speed measurement function and image display function of the host computer were developed,and the performance test of the image transmission system was successfully realized.Simulation and board-level verification results show that the functions and performance of the system and each module meet the design requirements.Among them,PCIE can achieve error-free transmission at a rate of 1222MB/s in DMA mode,and the transmitted image data can be displayed clearly and stably.The results of this thesis can be applied in the field of high-speed image transmission such as image acquisition and 3D reconstruction.