Research On Design Technology For High Speed Multichannel Driver

With the development of High-performance Computing,Cloud Computing and Big Data,the worldwide hyper-scale data centers and high-performance supercomputer centers confront multiple problems with regard to efficient data transmission,storage,and processing.Since optical interconnect has particular advantages over electrical interconnect on transmission rate,power consumption,and interconnect length,hence the optical interconnect technology is widely employed within data centers and high-performance computers.Aimed at the increasing need for high-speed interconnect network in the next-generation high-performance computer system,this paper proposed a high-speed multi-channel driver structure,and finished the circuit design as well as the physical realization.We designed a driver IC supporting 25 Gbps data transmission,and completed the module design including input stage,retimer stage,clock and delay control stage,and output stage.While elevated the output swing to 3Vppd,a bandwidth of 17.2GHz was also achieved.On that basis,we also proposed a 6 channel high-density driver array,ensured the data synchronism with the help of the differential clock tree and delay control circuits,solved the inter-channel crosstalk problem,and verified the performance of the multi-channel driver array.Based on 0.18?m SiGe technology,this paper proposed a 6 channel 25 Gbps driver IC with a core area of 1.8mm×1.86 mm.According to the simulation results,the driver IC supports 6×25Gbps NRZ parallel data transmission,with a maximum clock delay tuning range of 10.28 ps,and a single-channel power consumption of 632.2mW under 2.3/3.6V supply.