The Design Of Timing Error Detection And Correction Circuit Facing Ultra Low Voltage

As the development of integrated circuit technology,the chip may have variations on process?voltage?temperature and aging,the PVT and aging variation will be very remarkable when working on low voltage especially ultra-low voltage.The PVT and aging variation may cause timing variation,and the timing variation will cause timing error when it accumulate after passing all level registers in the pipelines of the integrated circuit.The timing error must be detected and then corrected to prevent the function error of the circuits.Currently,the research of timing detection and correction is becoming more and more popular,and many people are investigating in this area.Based on the problems the EDAC circuit with the latest structure will face when working on low voltage,we finished the improvement and optimization of timing error detection and correction circuit to ensure the EDAC system can work on low voltage.Then we designed a FIR filter as the verification circuit of the EDAC system based on low voltage design,and let the EDAC technology make a application on practical circuit.The simulation show that the EDAC system based on low voltage can detect and correct the timing error when the working voltage changes from 0.3V to 0.6V.The design complex rate of ultra-low voltage EDAC is very low and the dynamic power reduce 13.2% compare to the previous EDAC system.Monte Carlo simulation show that the EDAC system can finish error detection and correction in the FIR filter when the voltage changes from 0.3V~0.6V,so it can prove that the design of ultra-low voltage EDAC technology is reasonable and reliable.