Technical Study About High Aspect Ratio Silicon Etch

Deep silicon etching technology has been widely used in many fields of industry,including the manufacture of integrated circuits,the design of microelectromechanical systems,the study of nano-photonics,and the stacking of three-dimensional integrated circuits.The technology has undergone from wet etching to dry etching,with the expansion and advancement of the application field,the technology has also been greatly developed.However,in the silicon-based etching process,high aspect ratio etched structures has become a technical difficulty,and this structure can't be avoided in many application fields.Therefore,the research of high aspect ratio silicon etching has great practical value.At present,high aspect ratio silicon etching in the structure size of tens of micrometers to hundreds of micrometers has achieved good results and basically satisfies the applicable fields,but with the exploration of the micro-nano world,high aspect ratio silicon etching of micro-nano structures still need to be constantly improved.In the deep silicon etching process,common problems are that the sidewall of the etched surface is not flat,and the bottom surface of the groove is not horizontal.In regard of the micro-nano size,these conditions become more and more demanding.Based on the principle of seeking truth from facts,this paper analyzes the four variables affecting the etched morphology by using the control variable method.By comparing the experimental results,we find the influence of each variable on the etched morphology.With these experimental data,we will have a deeper understanding of the deep silicon etching process of micro-nano structure size,and also greatly facilitate the process of finding optimized parameters.The main content of the thesis includes:(1)Development history and current status of high aspect ratio etching process.The evolution of wet etching,plasma etching,Bosch etching,and the application of high aspect ratio silicon etching in microelectromechanical systems(MEMS),through silicon vias(TSVs),and small integrated circuit systems are introduced.(2)The basic principle of ICP-RIE etching.Finally,two functions.(3)Experimental plan and implementation.The experiment is divided into eight steps,namely,growth of Si,spin-on,EBL,development,growth of mask,stripping,etching,and removing of mask.Also,the equipment and reagents used in each steps are described in detail.(4)Experimental results and analysis.