The Study On Copper Electro-deposition In High Aspect Ratio Through Silicon Vias

TSV technology is the abbreviation of “Through Silicon Via” technology,is a kind of new technical solution for three-dimensional integrated stack chips to realize interconnection.By using TSV technology,products can get better electronics performance,lower power cons?mption,lower noise,smaller packaging size and multi-functionalization,to meet the needs of the development of cons?mer electronics products,is a trend in the development of microelectronics technology in the future.In this thesis,a TSV plating simulation model with 2 additives was developed based on a build-in TSV plating model in COMSOL.The new simulation model was verified by an expe riment.And then the model p arameters also been optimized by the experiment.Copper electro-deposition is the key technology of TSV technology,how to realize the filling of high aspect ratio TSV was always a difficult problem in the industry.There are many factors that can influence the effect of TSV electroplating filling,such as the size of the TSV,morphology,seed layer thickness,continuity,pretreatment,etc.This thesis will research TSV filling process base on the plating solution and plating process conditions.TSVs with diameter of 10 ?m and depth of 100 ?m without voids or seams have been achieved in the 12 inch wafer experiments.And also study on the conformal filling of TSVs with diameter of 30 ?m and depth of 100 ?m.The plating speed and plating coverage were both good.They can meet the requirements of the integrating of processing and the design of the product.Optimizing the plating process,to get a stable and economic TSV filling method,is the main purpose of this thesis.