Research And Implementation Of High Performance Secure Storage System Based On Multi-core Network Processor

In recent years,with the development of computer technology,data storage services have become more widely used in various industries.In the data storage system,the IPSAN system is favored by users because it has advantages of unlimited transmission distance based on TCP/IP network technology.However,as hackers continue to increase the number of network attacks,they pose a serious threat to data storage and transmission security.The vast majority of current IPSAN systems have problems with unsatisfactory security and performance.Therefore,this paper guarantees the data security of the IPSAN system by designing and implementing a high-performance secure storage system.The se-cure storage system adopts the Tilera_Gx36 many-core network processor as a hardware platform and is deployed between the initiator and the target of the IPSAN system,and achieves the purpose of secure storage by encrypting and decrypting the data carried in the iSCSI packet.The secure storage system supports multiple iSCSI sessions for data reads and writes simultaneously,and supports data throughput of 8 Gbps on the network port.The research work is as follows:1.Research on packet parallel technology in manycore processor platforms.This paper adopts many-core processors as the hardware platform.How to exploit the advantages of many-core processor parallel performance becomes the focus of this article.This ar-ticle believes that secure storage systems using TCP connection-level parallelism can achieve better performance than packet-level parallelism.At the same time,static flow binding is used when mPIPE performs packet splitting to improve the utilization of each CPU cache.2.Secure storage system design based on Tilera_Gx36 Manycore Network Processors.The secure storage system uses the high-performance Tilera_Gx36 processor as the hardware platform,which has 36 CPU cores available to developers.According to the different task functions performed by the CPU,these CPUs can be divided into a con-trol plane and a data plane.The control plane CPU is responsible for system configu-ration management,interaction with the management board,and other functions;the data plane CPU core is responsible for the processing of the fast path data packet ser-vices,including a network message processing module and a data encryp-tion/decryption module.3.Research on network message processing module technology.The secure storage sys-tem is equivalent to a transparent encryption/decryption gateway.In order to obtain the data transmitted by the initiator and the target,the secure storage system encrypts and decrypts the data carried in the iSCSI message and sends it to the other party.This pa-per improves the eff-iciency of TCP stream reassembly by reducing TCP state machine,hashSplay algorithm,and flow table caching mechanism.4.Use the MiCA hardware encryption and decryption engine to implement the 3DES al-gorithm to encrypt and decrypt data.Compared to encryption and decryption algo-rithms implemented in software,the speed of MiCA engine encryption has increased by several orders of magnitude.Store the key in the SQLite database and query it through the mapping table to improve the security of the key.The network message processing module and the data encryption/decryption module adopt a buffer mecha-nism of the exchange memory area,reducing the overhead of a large number of locks.Finally,the Secure Storage system was tested in terms of functionality and perfor-mance,achieving expected data read and write performance of 8 Gbps.