Research On Task-&Data-level HEVC Parallel Decoding Technique And Application Based On Multi-core Processor

Compared with the previous video codec standard,the latest HEVC video codec standard is facing the problem of rapidly increasing computational complexity,which directly affects its operation and implementation.In our thesis,we will use the Tilera-Gx36 multi-core processor provided by the American Tilera company as our hardware experiment platform.Based on the multi-core platform,an efficient parallel decoding algorithm which combined the task-level parallel method and data-level parallel method is implemented.The main research contents and innovation points of this thesis are as follows:1.This thesis analyzes the dependence of each filter boundary in the video frame and explores the parallel method that can be used.We also analyze the existing parallel deblocking filter algorithm,and it is improved to further promote the decoding efficiency of the deblocking filter module.Meanwhile,a reasonable CTU partition structure is designed to make the parallel algorithm have low delay and high efficiency.2.This thesis divide the entire HEVC decoder into multiple functional task modules by using the dependency in HEVC data.For each task module,different parallel acceleration method is adopted,and buffer storage space is effectively managed to improve parallel efficiency.At the same time,we pipeline these task modules to make full use of multi-core processor.Thread pool is used to dynamically allocate thread resources for decoding tasks,and a HEVC decoding method based on multi-core platform with task-&data-level parallelism is implemented,which achieves higher decoding speedup than WPP method.3.This thesis provide a variety of optimization methods for the HEVC decoder.By using thread pool technology and the introduction of data redundancy reduction mechanism,The decoding ability of the decoder can be further improved.Aiming at all kinds of efficient parallel decoding algorithms proposed in this thesis,we designed several comparative experiments,and analyzed the experimental results,so as to verify the effect of parallel decoding algorithm.From the experimental data,we can see that the parallel deblocking filter algorithm designed in this thesis has significantly improved the parallel speedup at different QP values,and the maximum speedup has reached 8.At the same time,compared with Tile parallel algorithm and WPP parallel algorithm,the maximum acceleration ratio of pixel decoding and reconstruction parallel algorithm achieves 10 under different quantization QP values.In addition,using SIMD optimization,the decoder can increase the acceleration ratio of nearly two times in the case of single core processor.The high efficiency HEVC parallel decoder designed in this thesis can complete the real-time decoding of high definition video stream without any coding tool.Finally,the thesis gives a summary of the whole work and prospects the future research.