The Design And Implementation Of I~2C Device Interface Controller On Security SoC Chip

The development of integrated circuit has led to the change from traditional IC to the system on chip(SoC).With the application of SoC in military and financial,transportation,home and other fields,the inherent defect which information is easy to leak of the SoC is gradually highlighted.Security SoC is designed for the field of information security and can effectively deal with the problem of information leakage.I~2C interface is a simple bidirectional two wire serial bus interface.I~2C interface is widely used in the security SoC chip because of its advantages such as less line,easy to control and so on.But the transmission rate has been constraining its use.On the basis of the fully understanding of I~2C 6.0 protocol,this thesis puts forward the design method of I~2C 6.0 device interface controller for security SoC chip.This paper adopts the top-down design method,in the design,in the first place,defines the top-level module of the design from the system level;the next,divides the top-level module into many sub-modules according to the structure and function;and then introduces the specific function of each sub module and the realization way in detail.Thesis describes how to build the test platform in next chapter and writes different test vectors in view of the features of I~2C 6.0 interface controller for the functional verification in system level.Subsequently,the thesis proceeds the after the layout and routing simulation,FPGA verification and test.Verification results show that the design of this paper has reached our expectations.The design in this paper has the following innovative results:The I~2C interface is compatible to part function of SMBUS.When the I~2C slave device stretches the clock down,master device can set low level value(maximum)and count the low level time with a counter.If the low level time is more than the specified value,the master device can produce a timeout flag.Hardware can make corresponding processing according to the sign,and it avoid the error caused by bus.In order to improve the efficiency of the internal data processing,the interface adds dynamic FIFO mode for data storage.It breaks through the speed bottlenecks,greatly improving the transmission rate of interface.