Design And Application Of High Speed Data Interconnect Module Based On FPGA

In recent years,with the increasing complex functions of digital storage oscilloscopes,a large number of sampled data streams have imposed higher requirements on their data processing capabilities and data transmission speeds.The data transmission rate of the hardware circuit and the computer has gradually become a key factor limiting the performance of the oscilloscope.At the same time,the rapid development of high-speed serial transmission technology provides a new solution to this situation.This article designed a high-speed serial transmission-based high-speed data interconnect module,which mainly includes the design of high-speed interconnect modules based on PCI-Express protocol and trigger fast positioning module based on GTX,and applies the above modules to high-sampling-rate digital oscilloscopes.In summary,the main research tasks include following aspects:1.Design the hardware circuit of the high-speed interconnect module to lay the foundation for the function realization.From the perspective of signal integrity,the PCB design and debugging of the high-frequency data transmission module has been completed,including considerations of Trace length,characteristic impedance,level standard,and power supply stability.2.Data stream transmission based on PCIe core in the FPGA,including the accurate transmission of control commands from the host computer to the hardware system and the rapid transmission of large amounts of data?This module,including the design of the DMA interrupt mechanism and the design of high-speed data flow control,ensures that DMA reads and writes data accurately and achieves the data transmission speed of the target.3.The design of high-speed data cache module based on FPGA MIG core,including the design of the state machine which can control reading and writing of DDR3.That can achieve high-speed data cache,through the expansion of data width to achieve that two parallel DDR3 particles store data at the same time,so that ensures the DDR3 particles read and write data orderly and accurately.4.The implementation of trigger module based on GTX core in FPGA,which mainly includes GTX receiver module design and digital trigger module design.Through the trigger module generates the buffer control enable of ADC acquisition data,and sending the acquired data to the waveform drawing module.Finally,the trigger module is applied to a 20 GSPS digital oscilloscope to make the waveform display stably.Through the debugging of each circuit function module and the performance test of the prototype,the speed and precision of the data transmission have reached the predetermined design requirements.And the high-speed data interconnect modules are applied in the high sampling rate digital oscilloscope.In addition,the portability and versatility of the interconnection modules are good,and they have extremely high practical value.