Research Of Novel Segmented Stildmos

With the rapid development of power integrated circuits,bipolar cmos dmos(BCD)process has become the mainstream fabrication technology of power devices.Power lateral double-diffused metal oxide semiconductor(LDMOS),which is the key of BCD prcess has been widely used because of its advantages such as high breakdown voltage,large drive current,good switching performance and low cost of fabrication.However,due to the market continuous pursuit for lower power consumption,higher operating frequency and higher integration,the need for a power LDMOS with high breakdown voltage,low specific on-resistance,small gate-drain capacitance and high reliability simultaneously is urgent.A power device called novel segmented shallow trench isolation(STI)LDMOS is carefully studied in this papaer.Firstly,novel segmented STI LDMOS is simulated and optimized by technology computer aided design(TCAD)software Sentaurus in order to determine the structure size and process parameters,which can meet the electrical design specifications.It focuses on the five parameters below:the length of drift region,the doping concentration in drift region,the length of STI,the width of STI and the distance of gate field plate.Then,the reliability of the novel segmented STI LDMOS has been studied,it reveals that:Kirk effect and the conduction of parasitic NPN transistor are the major reason affecting the hold voltage and on-state breakdown voltage.Adding a low voltage N-well close to the drain side can make the electro-static discharge response characteristic meet the design window and extend the safe working area effectively.The hot electron injection at the comer of STI and the generation of interface state are responsible for the degradation of the linear drain current,using the round STI structure can reduce the peak value of impact ionization ratio and improve the reliability of the hot carrier.Final simulation results show that the threshold voltage of noval segmented STI LDMOS is 1.2V,the off-state breakdown voltage is 32.2V,the specific on-resistance is 11.78m?·mm2,the gate-drain capacitance is 0.34fF,the second breakdown current is 1.8×10-3?m,the on-state breakdown voltage is 27.2V and the biggest impact ionization ratio under the worst stress is 2.12×10227cm-3/s.The device satisfies the design specification and achieves a good balance between withstand voltage,conduction loss,switching performance and reliablity.The achievements in this thesis are helpful to the design of novel power LDMOS under BCD process.