Research On Constraint Propagation In VLSI Physical Design

With the rapid development of complex semiconductor technology,the integration of circuits is continuously improved and the number of transistors in the chip is increasing.In VLSI Design(VLSI),one chip can integrate more than one billion or even hundreds of transistors,so the design of integrated circuits is becoming more and more difficult.A physical design is a design process that is directly related to the product,playing an important role in the VLSI design.Generally divided into division,floorplan,placement and routing.Whether physical design is good or bad,is a direct impact on the design cycle length,cost and quality level.Firstly,this paper introduces the mathematical model of circuit division and KL algorithm,FM algorithm,hMetis algorithm,mathematical model of floorplan or placement and Simulated Annealing algorithm,genetic algorithm,the mathematical model of routing and Sequential Routing and Rerouting algorithm.Secondly it introduces representation of constraint and the definition of direction constraint,boundary constraint and adjacency constraint.In this paper,we study the propagation method of constraint,and put forward the communication research of constraints in VLSI physical design.Firstly,The MD5 algorithm converts the digital signature into a circuit constraint.And then add the constraint to the circuit file through the constraint embedding algorithm,analysis the effect of the constraint on the length of the line at different stages.Constraint extraction algorithm is used to extract constraint of the circuit files after routing.Through the results of extracted constraint compared with the original constraint,analyze the probability that a constraint can propagate in the physical design process.Finally,optimize the circuit and analyze the wire length and the change rate of optimized circuit of the constraint.The influence of constraint on the placement phase and routing phase in VLSI physical design is studied to verify the propagation process of constraint.The experiments results shows that in the placement phase and the routing phase,after the embedded constraint,the HPWL and WL of the circuit are increased.And for most circuits,the HPWL and WL of circuits which own more number of embedded are longer.Different constraint have different effects on HPWL and WL.Among them,the boundary constraint on WL has a large impact.After optimizing the circuit,circuit HPWL and WL have a certain degree of reduction,but the reduction in wire length is at the expense of constraint sacrifice.Before optimization,constraint can spread in the placement with the probability of 100%.After optimization,the probability is reduced to 50%.