Research And Implementation Of Precise Clock Synchronization Technology

With the continuous development of 3G/LTE/5G,wireless network is evolving from ordinary several antennas to large-scale MIMO so that new-era 5G system can effectively use digital beamforming technology to achieve flexible space resource scheduling.As a result,a new requirement of high precision time synchronization is put forward among antennas.In 5G test platform using the 100 MHz signal bandwidth,the signal timing error between antennas needs to be controlled within a sampling period in order to realize DBF technology.Common clock synchronization devices on the market at present cannot meet the precision requirement of 5G test platform.Therefore,this thesis attempts to adopt a clock synchronization scheme that is the combination of IEEE1588V2 clock synchronization protocol and synchronous Ethernet technology to research how to realize the high precision clock synchronization requirement of 5G test platform.Firstly,this thesis introduces the basic theory of clock synchronization.Then it introduces relevant theories of IEEE1588 clock synchronization protocol and synchronous Ethernet.The third and fourth chapters provide the detailed realization process of the hardware and software about the IEEE1588 slave clock system.The embedded IEEE 1588 slave clock synchronization system designed in this thesis,adopting a PHY chip named DP83640 supporting IEEE1588 protocol,achieving event message timestamps at MII interface,combining with synchronous Ethernet technology,can effectively improve the clock synchronization precision and avoid crystal vibration frequency jitter that effects the stability of the local time.Finally,the thesis tests the synchronization accuracy of the IEEE1588 slave clock system,including ordinary PTP synchronization and the other synchronization method based on synchronous Ethernet.The results show that synchronization accuracy will enhance with synchronous cycle shorted in ordinary PTP synchronization.But with the limitation of selection of hardware,the shortest synchronous cycle is 0.0625s.Under this circumstance,the peak-to-peak value of synchronization error is around 20ns,which can't meet the clock synchronization accuracy requirement of 5G test platform.On the basis of ordinary PTP synchronization,synchronous Ethernet technology promotes the precision of the clock synchronization system a lot.Test data shows that the peak-to peak value of synchronous error is less than 1 ns.In this thesis,the clock synchronization scheme has been successfully applied in 5G test platform.