Research On Hardware Timestamping For Clock Synchronization Message Of IEEE1588

With the extensive application of distributed systems, the demand of high-precision clock synchronization system is increasing. With a precision as high as sub-microsecond, IEEE1588 standard is the most accurate clock synchronization protocol in distributed network available. In order to timestamp the arrival and departure time of synchronization message precisely, dedicated hardware circuit in the physical layer is designed. The utilization of this circuit is one of the key technologies to achieve high-precision clock synchronization.On the basis of the previous research of our laboratory, this thesis focuses on the development of the method which uses dedicated hardware in the physical layer to timestamp the synchronization message precisely. The scheme of "Altera SOPC + MAC chip + PHY chips" and the scheme of "Altera SOPC + PHY chip" are proposed to obtain the information of message from the physical layer. For the former scheme, the driver of network interface card is provided by Altera Corporation, which can be considered as a good reference. For the latter scheme, the relevant circuit is simple and the system is more reliable. Based on the former scheme, the driver of LAN91C111 (MAC chip) in Nios system is redesigned. In the form of customized-components the detection of synchronization message and timestamp logic is developed. The sending and receiving software is programmed and the corresponding test platform is established.Experiments show that the redesigned network driver can work well with the external PHY chip (LXT972A) and detection of synchronization message and timestamp components can accurately detect the synchronization message which is sent and received by the test program. The above work has laid a solid foundation to the follow-up development of high-precision IEEE1588 Standard network clock source.