Research And Design Of A Low Offset Vertical Hall Sensor

With the advantages of low cost,low power consumption,high integration and strong anti-jamming capability,Hall sensor in CMOS technology can realize detection of magnetic field and has been widely used in industrial manufacturing,science research and Consumer electronics.But in many cases,the measured magnetic field is not in a single definite direction,so it is necessary to use both horizontal and vertical Hall devices to detect the three-dimensional magnetic field.Compared with the horizontal Hall device,the vertical Hall device has lower sensitivity to magnetic field and higher offset.Therefore,this thesis studies the device structure and signal conditioning circuit of the vertical Hall sensor and designs a low offset and high sensitivity vertical Hall sensor based on current mode.Firstly,a new vertical Hall device with double well coupling and symmetrical structure is designed to reduce the offset.The asymmetric structure is the main reason of high initial device offset.The double-well three-contact coupled device in CMOS high voltage technology is presented.This structure has not only good symmetry with a lower initial offset,but also can be compatible with four phase spinning current technique.Simulation verification of silvaco TCAD shows the initial device offset is 0.94 mV and four phase average offset is as low as 12?V,the voltage sensitivity of 0.027 T-1 and the current sensitivity up to 164V/AT.Secondly,a four phase spinning current circuit based on current mode is designed to eliminate the offset and 1/f noise and to improve the current sensitivity of the Hall device.On one hand,sensitivity of Hall device based on current mode voltage mode doubled that based on voltage mode,and this working mode can effectively improve the low sensitivity of vertical Hall device.on the other hand,spinning current technique can effectively eliminate the offset and 1/f noise of the vertical Hall device.Therefore,a four phase spinning current circuit based on current mode is designed,not only doubled the current sensitivity of the Hall device to 0.054T-1,but also output the Hall current effectively with a low residual offset.Thirdly,a signal conditioning circuit with negative feedback modulation function is proposed to reduce the offset of signal conditioning circuit.The offset of vertical Hall sensor comes from the offset of vertical Hall device itself and offset of the signal conditioning circuit.This thesis presents a modulation circuit based on the principle of negative feedback,modulating part of the signal conditioning circuit output signal and then enter the DDA along with the output signal of spinning current circuit.Then through double correlation sampling demodulation and low-pass filter,and lastly recover hall signal and eliminate the offset of signal conditioning circuit.Using the Cadence tool to simulate the whole circuit of the vertical Hall sensor,we figure out the final residual offset of the circuit is only 0.3mT,and the linearity is 99.9%.The whole circuit layout is designed with a total area of 1250 ?m×1010 um,and the post simulation is completed.