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Research On High-Speed Digital Processing Technology Of The Satellite Modulator

Posted on:2017-10-23Degree:MasterType:Thesis
Country:ChinaCandidate:C LiFull Text:PDF
GTID:2348330512464437Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the continuous development of space technology,the link bandwidth of satellite payload systems onboard has become a key constraint system performance.The communication data rate of backbone transmission links from satellite to ground will have an order of magnitude increase,to several G bps,even to a few tens of G bps;speed satellite access network air interface breakthroughs will also be tens of megabytes to hundreds of megabytes forward.To satisfy the needs of high-speed data transmission,and to increase the capacity and quality of service of the system point of view,it is necessary to consider the development of satellite high-speed data transmission system.The main research goal of this topic is to complete the high-speed digital processing system of the satellite modulator,the process need to break through the high-speed DAC applications and dual DAC synchronization technology,satellite-borne high-speed data bus technology,FPGA independent multi-version configuration technology,high-speed PCB design techniques EMC design techniques and high-speed data transmission equipment and many other technologies.These techniques have a strong practicality,and in the domestic leading position in the field,part of the contents will have a significant impact on the entire application system.Before the key technology research,this paper starts from the sampling theorem and DAC works,discusses some indicators parameter of DAC,and then analyze the high-speed parallel sampling DAC and the principles of necessity works.In theory,analysis the influence of the transmission line effects of the digital signal waveform generation,and find the right solution to transmission line effects problem.For example,you can be satisfied with the waveform by the parallel transmission line termination resistor matching.These are the theoretical basis for subsequent research.Applications in high-speed DAC circuit and dual synchronous sampling techniques,this paper presents considerations applied when the high-speed DAC,the DAC double necessity synchronous sampling techniques,technical difficulty,and error approach to the application circuit.In the study of satellite high-speed PCB design techniques,load high-speed PCB design by analyzing satellite should consider elements using transmission line theory and engineering experience in PCB design,draw some designcriteria for satellite high-speed PCB design time,and all use of high-speed signals integrity simulation software to this topic in PCB design simulation analysis,corrective and improve system performance.Another three techniques in this paper were also provided a relevant solution.In this paper,there are two main innovations: one is the use of high-speed SI simulation software to resolve high-speed high-frequency signal integrity problems quickly jump along varying signal and obtain a good solution to specific engineering problems;the other is a dual DAC synchronous sampling technology.According to the final test,dual DAC synchronous sampling system can be completed synchronization calibration in ms level,the noise ratio(SNR)of DAC output signal is less than 54.8dB,stray is less than-52 dBc,effective number bits of DAC is 8.81,which can satisfy the most performance engineering application.Further,according to the result of system testing,using the digital processing system in this paper,data processing capabilities of satellite modulator is up to 2.4 G bps.
Keywords/Search Tags:satellite, High-speed, DAC, parallel process, the design of high-speed PCB
PDF Full Text Request
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