Design Of Display Driver Interface Based On MIPI Protocol

LCOS(Liquid Crystal on Silicon) display chip is a silicon-based liquid crystal micro-display technology video driver chip. Common and portable mobile electronic devices such as wearable devices with very low power requirements, but also has a higher display resolution.Traditional mobile electronic device display driver interface has been difficult to meet the current mobile electronic devices with low power consumption and low electromagnetic interference, high resolution and other aspects of performance requirements. Based on the MIPI protocol specification design can be embedded in an LCOS display chip DSI interface circuit. MIPI-DSI interface is a MIPI((Mobile Industry Processor Interface) of Alliance defined display interface standard, DSI interface is a serial interface having a clock channel and two data channels, clock channel transmission speed DDR differential clock for slave image data transmission and decoding provide synchronous clock, the data channel in high-speed mode differential signal transmitting high-speed image data at low under low power consumption mode commands and data transmission, or the slave response data transmission to the host. the design according to MIPI protocol requirements, writing system and module spec spec, design modular design method, MIPI interface circuit including physical layer, channel management, protocol and application layers. each layer subdivided into various functional modules. the circuit supports both single-channel high-speed transmission can also support single-channel high-speed transmission, data channel 0 can support low-power transmission and trans transmissions mode switching sequence is detected using one-hot coding finite state machine described. supports ECC and CRC data error detection and error correction in the ECC program design and CRC decoding and encoding method using the resource reuse, reduce the circuit area. support high-speed mode the output image DPI four kinds of data format, low-power reception mode supports converting data into DBI format output, reverse transfer mode supports to convert data into a format DBI DSI differential signal through the data channel 0 output.In this article, Programming of each module circuits are described using Verilog HDL language. Use NC-Verilog design verification system module design and functional verification, design timing constraints, use the synopsys Design Compiler synthesis tool team designed a comprehensive code optimization.